The present invention relates to ATM switches and more particularly to improving utilization efficiency of the switching apparatus.
The ATM protocol is an underlying concept of the B-ISDN system widely in use today by Telecom companies. It provides connection-orientated communication. It divides data into cells, typically 48 bytes long with an additional 5 bytes for use with the protocol, thus enabling data transmission with only a 10.4% overhead. The address data in each cell is location data specific to the two units exchanging data so that the individual communication can be routed through the most convenient channel available at the time. An advantage of the system is that it can accommodate large numbers of heavy users without mutual interference.
In order to enable such a protocol, a switch is required at the center of the network to route cells. It must have the intelligence to identify the address information and interpret it correctly. As the communications are generally asynchronous it must have the ability to buffer the cells if they cannot be sent immediately and the buffering must be able to cope with the large volumes of data that are likely to appear all at once whenever there are a large number of users. Any communication using ATM requires a handshake protocol between the two communicating units to set up the link in the first place.
There are two known types of ATM switch, the type used in global or wide area networks WANs, known as public ATM switches, and the type used in local area networks, LANs, known as private ATM switches.
The use of a switch in a network implies that incoming data is all sent to a central logical point where the switch is located and where the data can then be directed to its destination. The very existence of such a central location implies the potential for a bottleneck in the system before beginning to take into account the question of delays introduced by the switching operation itself.
It has therefore been a major concern within the field of network switching design to remove any potential for delay and maximize the efficiency of the switch.
ATM switches receive data cells at input ports and process the data in the cell headers to direct the cell to the appropriate output port. In practice the analysis of the cell header results in the cell being tagged with the output port address. The cell is then output onto the data bus and eventually received by the output port corresponding to the tag. The output port sends an acknowledgment to indicate that it has safely received the cell. If the output, or destination, port is occupied then this acknowledgment is not received. The input cell will assume that the data was not received, and will resend the original cell in the next data cycle. It will continue to send the cell until the appropriate response is received. The original cell is stored meanwhile in the input port data buffer. In a more advanced approach it will attempt to send another cell to a different destination in the next cycle and will wait for several cycles before attempting to send the first cell again.
The most likely reason that the data was not received was that the data buffer at the output port was temporarily occupied serving another cell source. Whether this is the case or not the outcome is that the cell is sent at least twice and thus bandwidth of the internal bus cycle of the switch is wasted. The simplest way to deal with the problem, and a solution that is widely used, is to increase the bandwidth within the switch. This increases the number of components, hence the cost of the system and the likelihood that something will go wrong, and of course means that most of the bandwidth is unused most of the time.
In the case of point to multipoint communication, that is to say when the cell that is received is to be sent to more than one of the output ports, then the extent of wasted cycle bandwidth increases. As the individual cell has to be sent separately to each of the required output ports, during times of particularly heavy traffic this can lead to the collapse of what is essentially a trial and error algorithm. Even if extra bandwidth is provided, as mentioned above, it is unlikely to be sufficient in these circumstances.
It is an object of the invention to provide a means of transmitting a cell from an input port only when the relevant output port is available to receive it.
According to a first aspect of the invention there is provided a data switch having at least one input port and a plurality of output ports, wherein the input port and the plurality of output ports have associated data buffers and wherein the input ports are connected to the output ports via a data transfer mechanism, wherein the at least one input port is arranged to engage in a handshake protocol with at least one of the output data buffers, from which it is able to determine whether the output data buffer is available to receive data.
Preferably, when a data cell that is to be switched is received at the input port, address information from the cell is used to determine which of one or more output ports it should be sent to. The list of one or more output ports that is obtained is then compared with the output ports that are available to receive data, and the cell is only sent to those output ports that are currently available. If any of the required output ports are not available then the cell is held in the input buffer data port, and is sent to each such output port as soon as it becomes available.
According to a second aspect of the invention there is provided a method of transferring data arranged in cells across a data switch operating in a cyclical manner. The switch has at least one input port and a plurality of output ports, the cells each have a data section and address information. The method begins with the step of sending control cells, or missionary cells, from the input port to each one of the output ports, sending a signal from each output port back to the input port, under the influence of the control cell, to indicate whether the output port to which it has been sent is able to receive data during a present data cycle, receiving a data cell at the input port, reading the address information from the received data cell to determine one or more output ports indicated by the address information, sending the data cell to each output port which is indicated by the address information and which is able to receive data, and if any output ports indicated by the address information are unable to receive data then retaining said data cell.
Preferably the data cell so retained is sent to the presently unavailable output ports during the first data cycle following the present data cycle during which the respective output port indicates that it is available.